dsp_rx_regs_t Struct Reference

#include <memory_map.h>

List of all members.

Public Attributes
volatile int32_t	freq
volatile uint32_t	scale_iq
volatile uint32_t	decim_rate
volatile uint32_t	rx_time
volatile uint32_t	rx_command
volatile uint32_t	clear_state
volatile uint32_t	dcoffset_i
volatile uint32_t	dcoffset_q
volatile uint32_t	rx_mux
	input mux configuration.
volatile uint32_t	gpio_stream_enable
	Streaming GPIO configuration.

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Member Data Documentation

volatile uint32_t dsp_rx_regs_t::clear_state

volatile uint32_t dsp_rx_regs_t::dcoffset_i

volatile uint32_t dsp_rx_regs_t::dcoffset_q

volatile uint32_t dsp_rx_regs_t::decim_rate

volatile int32_t dsp_rx_regs_t::freq

volatile uint32_t dsp_rx_regs_t::gpio_stream_enable

Streaming GPIO configuration.

This determines whether the LSBs of I and Q samples come from the DSP pipeline or from the io_rx GPIO pins. To stream GPIO, one must first set the GPIO data direction register to have io_rx[15] and/or io_rx[14] configured as inputs. The GPIO pins will be sampled at the time the remainder of the DSP sample is strobed into the RX sample FIFO. There will be a decimation-dependent fixed time offset between the GPIO sample stream and the associated RF samples.

3 2 1 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 +-------+-------+-------+-------+-------+-------+-------+-------+ | MBZ |Q|I| +-------+-------+-------+-------+-------+-------+-------+-------+

I 0=LSB comes from DSP pipeline (default) 1=LSB comes from io_rx[15]

Q 0=LSB comes from DSP pipeline (default) 1=LSB comes from io_rx[14]

volatile uint32_t dsp_rx_regs_t::rx_command

volatile uint32_t dsp_rx_regs_t::rx_mux

input mux configuration.

This determines which ADC (or constant zero) is connected to each DDC input. There are N DDCs (1 now). Each has two inputs.

 Mux value:

    3                   2                   1                       
  1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
 +-------+-------+-------+-------+-------+-------+-------+-------+
 |                                                       |Q0 |I0 |
 +-------+-------+-------+-------+-------+-------+-------+-------+

 Each 2-bit I field is either 00 (A/D A), 01 (A/D B) or 1X (const zero)
 Each 2-bit Q field is either 00 (A/D A), 01 (A/D B) or 1X (const zero)

 The default value is 0x4
 

volatile uint32_t dsp_rx_regs_t::rx_time

volatile uint32_t dsp_rx_regs_t::scale_iq

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The documentation for this struct was generated from the following file:

• memory_map.h